PyFPGA’s documentation

• Introduction
• Basic usage
  • Project Configuration
  • Bitstream generation
  • Bitstream programming
  • Debugging
• Advanced usage
  • Hooks
  • Options
• Helpers
  • hdl2bit
  • prj2bit
  • bitprog
• API Reference
  • Project
    • Project.add_cons()
    • Project.add_define()
    • Project.add_fileset()
    • Project.add_hook()
    • Project.add_include()
    • Project.add_param()
    • Project.add_slog()
    • Project.add_vhdl()
    • Project.add_vlog()
    • Project.make()
    • Project.prog()
    • Project.set_debug()
    • Project.set_part()
    • Project.set_top()
• Tools
  • Diamond
  • ISE
  • Libero
  • Openflow
  • Quartus
  • Vivado
• Internals
  • Underlying steps
  • Internal data structure
• Extending
  • Add support for the new tool
  • Add tests and tools mock-ups
  • Add examples
  • Verify the code
  • Verify the functionality
  • Updated the documentation
• Miscellaneous
  • History

Note

Documentation generated on 2025-03-22 21:06 (UTC).