API Reference¶
symbiflow.symbiflow
A class which provides an API to solves HDL-to-bitstream based on FOSS.
- class symbiflow.symbiflow.SymbiFlow(project='symbiflow', part='hx8k-ct256', outdir='.')¶
Solves HDL-to-bitstream based on FOSS.
- Parameters
project – the basename for generated files
part – name of the target FPGA part
outdir – location for generated files
- bitstream()¶
Performs bitstream generation.
- pnr(pcf=None)¶
Performs Place and Route.
- Parameters
pcf (list) – Physical Constraint Files
- programming()¶
Performs programation.
- set_oci(engine, volumes, work)¶
Set the OCI engine and its options.
- Parameters
engine – OCI engine
volumes (list) – volumes for the OCI engine
work – working directory for the OCI engine
- set_part(part)¶
Set the target FPGA part.
- Parameters
part – name of the target FPGA part
- synthesis(top, hdl=None, scf=None, param=None, arch=None, define=None, include=None)¶
Performs synthesis.
- Parameters
top – name of the top-level entity/module
hdl (list) – HDL files
scf (list) – Synthesis Constraint Files
param (list of lists ([‘PARAM’, ‘VALUE’])) – specify top-level Generics/Parameters
arch – specify a VHDL top-level Architecture
define (list of lists ([‘DEFINE’, ‘VALUE’])) – specify [System] Verilog Defines
include (list) – specify [System] Verilog Include Paths
- Raises
FileNotFoundError – when no HDL files are provided
NotImplementedError – when a feature was still not implemented
TypeError – when a Verilog header file is specified as an HDL